Frequency multipliers have been used in many applications for increasing the frequency of an input signal. Generally, a frequency multiplier is a harmonic conversion transducer for producing an output signal at a frequency that is an integral multiple of the fundamental frequency of the input signal.
A typical goal of frequency multipliers is to minimize conversion loss while providing sufficient harmonic rejection. Conversion loss is the amount of power lost in the input signal during the conversion of an input signal to an output signal. In addition, frequency multipliers, such as doublers, desirably produce an output signal that is a second harmonic frequency of the fundamental frequency of the input signal. When harmonic rejection is not sufficient, the resulting output signal may include odd harmonics which tend to dissipate power, cause signal distortion, and decrease efficiency.
In applications where the frequency of a signal may change or the frequency of the signal is unknown, a multiplier circuit that can provide frequency multiplication over a wide range of frequencies is highly desirable. Using the same multiplier circuit for several frequency multiplication activities decreases circuit costs associated with redesign, retooling, and a large inventory of multiple components with similar functions. In addition, many industries, such as the radar and microwave communication industries, are demanding miniaturized components for applications where space and power is limited.
Conventional diode multipliers realize power loss, in the order of 6 dB, so that the power of the input signal may be as much as four times the power of the output signal. Thus, in order to produce an output signal having an output power that is the same as the input power of the input signal, additional amplifier stages may be needed. Unfortunately, additional amplifier stages are undesirable in applications where space and power is limited.
Like diode multipliers, conventional single-ended non-linear multipliers also suffer from conversion loss. In addition, single-ended multipliers do not have effective harmonic rejection. This is a problem in applications where even harmonics are desired, for example in, frequency doublers. When harmonic rejection is ineffective, the resulting output signal of the single-ended non-linear multiplier may include odd harmonics which tend to dissipate power, cause signal distortion, and decrease efficiency.
Conventional push-push multipliers provide harmonic rejection. One conventional push-push multiplier is realized by combining a power splitter and a push-push amplifier which includes two transistors. The power splitter splits an input signal into two signals which are 180.degree. out of phase. The two signals are then amplified by the two transistors which are driven in phase opposition (i.e. 180.degree. out of phase). At the output of the transistors, the fundamental and other odd harmonic frequencies have opposite phase, and destructive interference cancels these frequency components. In addition, the second harmonic frequency signals have the same phase, and therefore interferes constructively to produce an output signal that is rich in second harmonic with low harmonics.
In order for the prior art push-push amplifier to achieve frequency multiplication with minimal conversion loss and distortion, the two signals produced by the power splitter are desirably well balanced both in amplitude and phase. The words "balanced" and "unbalanced" as used herein have meanings that are well-recognized in the art. A balanced signal has another signal which is instantaneously equal and opposite to it with respect to power and phase. An unbalanced signal lacks another such balancing wave. For instance the power, or amplitude, of the two signals may not be the same, or one of the signals may lag in phase relative to the other. Unbalanced signals input into the push-push multiplier cause conversion loss and signal distortion of the output signal.
Conventional power splitters employed with push-push amplifiers include quadrature splitters, distributed element hybrid splitters, and lumped element hybrid splitters. A typical quadrature splitter effectively splits an input signal into two signals that are one hundred and eighty degrees out of phase. Unfortunately, the quadrature splitter is relatively large thus not usable in applications where space is limited. Distributed element hybrid splitters also consume too much space at frequencies below millimeter wavelengths to be cost-effective. Furthermore, distributed element hybrid splitters operate over a narrow bandwidth, thus being unusable in applications where a wide frequency bandwidth is desired.
FIG. 1 shows a block diagram of a prior art lumped element hybrid splitter 20. Lumped element splitter 20 has an input terminal 22 for receiving an input signal 24. Lumped element splitter 20 also includes a first output terminal 26 and a second output terminal 28. A first signal 32 is output at first output terminal 26 and a second signal 34 is output at second output terminal 28. A leg 36 is configured to impose a substantially ninety degree phase lag on first signal 32, while a leg 38 is configured to impose a substantially two hundred and seventy degree phase lag on second signal 34.
Legs 36 and 38 are formed with lumped elements, such as capacitors and inductors (not shown) to produce the phase lags. The imposed phase lags produce a resulting phase difference between first and second signals 32 and 34, respectively, of one hundred and eighty degrees.
An inherent consequence of the operations of lumped element hybrid splitter 20 is that one of first and second signals 32 and 34, respectively will have more power loss than the other. In other words, splitter 20 does not produce first and second signals 32 and 34, respectively, that have balanced amplitudes. The unbalanced first and second signals 32 and 34 cause conversion loss and signal distortion when further processed by the two transistors of the push-push amplifier.
Another problem with splitter 20 lies in its configuration. A conventional layout of splitter 20 results in first and second output terminals 26 and 28, respectively, being at opposite diagonal corners relative to one another. Hence, a first transmission path 40 from first output terminal 26 to a first transistor input 42 of the push-push amplifier will be a different in length than a second transmission path 44 from second output terminal 28 to a second transistor input 46. First and second transmission paths 40 and 44, respectively, impose a phase delay on first and second signals 32 and 34, respectively, relative to the length of the transmission path. Therefore, if the lengths of first and second transmission paths 40 and 44 are different, the respective phase lags are different, thus producing first and second signals 32 and 34 that are unbalanced in phase at first and second transistor inputs 42 and 46. This unbalanced phase also causes conversion loss and distortion of the output signal.
Typical push-push amplifiers of a frequency multiplier have a high quality factor (Q) so as to desirably minimize power dissipation, or conversion loss. However, a high Q results in a multiplier circuit that operates over a narrow bandwidth. Although a high Q is desirable, a problem lies with operation of a push-push amplifier over a narrow bandwidth. Such a push-push amplifier may not have the capability to sweep over a range of frequencies and therefore the same push-push amplifier may not be usable in multiple applications. As discussed previously, multiple components with similar functions undesirably drive up system costs.
In order to meet the needs of system miniaturization to comply with space and cost constraints, the power splitter and push-push amplifier of a frequency multiplier may desirably be incorporated onto a single integrated circuit. However, conventional frequency multipliers are not suitable for integration in an integrated circuit due to large size and excessively narrow bandwidth operations.
Thus what is needed is an improved apparatus for processing an input signal having a first frequency to generate an output signal having a second frequency. Furthermore, what is needed is an apparatus that minimizes conversion loss and signal distortion. Furthermore, what is needed is an apparatus that is operable over a wide frequency bandwidth. In addition, what is needed is an apparatus that is readily miniaturized, power efficient, and low cost.